The need for efficiency is a particularly important design factor for the highly integrated requirements of transceivers used for wireless local area networks (LANs) and employing non-constant envelope modulation formats such as OFDM (Orthogonal Frequency Division Multiplex) which produce signals having relatively high peak-to-average power ratios. The assignee of this invention and application has developed computational transmitter circuitry (referred to herein as the digital front-end of the transmitter) which includes a phasor fragmentation engine for performing computational signal processing on such OFDM information signals. The phasor fragmenter deconstructs the signals after modulation (transformation) by an IFFT operational stage, into independent component (“fragment”) signals which have lower peak-to-average power ratios for more efficient processing by the analog circuitry (performing RF modulation and amplification/combining) than would be achieved by the original information signals from which they derive.
Chireix-type power amplifiers, being well-known to persons skilled in the art, are particularly suited for use with this computational transmitter circuitry. The Chireix architecture represents one of the LINC (Linear amplification with Nonlinear Components) architectures and uses linear, saturated, or switch-mode amplifiers to provide amplification for signals, such as OFDM signals, having amplitude as well as phase modulation. It operates by adjusting the phase of an RF waveform applied to two amplifiers, and combining the outputs through a combiner to reintroduce the amplitude modulation. While the Chireix architecture provides certain advantages, the interchip connection between the RF front end and the power amplifier with combiner (PA/C) introduces undesirable phasor gain and phase imbalances (misalignment between the two signals as they proceed independently along that path). In the past these imbalances have been addressed through the use of analog calibrators within the RF analog circuitry but the design of such analog circuits is very difficult and the effectiveness of such designs has not been good.
Therefore, there is a need for transmitter circuitry which enables the use of a Chireix-type amplifier architecture to advantage but provides improved calibrator circuitry to compensate for such phasor gain and phase imbalances.
There is also a need for means which would enable computational calibration in contrast with the problematic, conventional analog environment for RF signal calibration circuits.